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  DSP56854PB/d rev. 1.0 , 1/2002 ? motorola, inc., 2002. all rights reserved. dsp56854 preliminary product brief dsp56854 16-bit digital signal processors ? 120 mips at 120mhz ? 16k x 16-bit program sram ? 16k x 16-bit data sram ? 1k x 16-bit boot rom ? access up to 2m words of program or 8m data memory ? chip select logic for glue-less interface to rom and sram ? six (6) independent channels of dma ? enhanced synchronous serial interfaces (essi) ? two (2) serial communication interfaces (sci) ? serial port interface (spi) ? 8-bit parallel host interface ? general purpose 16-bit quad timer ? jtag/enhanced on-chip emulation (once?) for unobtrusive, real-time debugging ? computer operating properly (cop)/watchdog timer ? time-of-day (tod) ? 128 lqfp package ?up to 41 gpio figure 1. dsp56854 block diagram jtag/ enhanced once program controller and hardware looping unit data alu 16 x 16 + 36 ? 36-bit mac three 16-bit input registers four 36-bit accumulators address generation unit bit manipulation unit 16-bit dsp56800e core xtal extal interrupt controller quad timer or gpiog 4 clko external address bus switch external bus interface unit 4 reset irqa irqb v dd v ssio v dda v ssa external data bus switch bus control wr enable rd enable cs0-cs3[3:0] or a0-20 [20:0] modea-c or d0-d15 [15:0] 6 program memory 16,384 x 16 sram boot rom 1024 x 16 rom data memory 16,384 x 16 sram pdb pdb xab1 xab2 xdb2 cdbr spi or gpiof 2 sci or gpioe ipbus bridge (ipbb) 3 (gpioh0-h2) 6 10 v ddio 11 decoding peripherals 4 system bus control memory pab pab cdbw cdbr cdbw v ss 6 gpioa0-gpioa3[3:0] 6 essi0 or gpioc host interface or gpiob 16 rsto dma 6 channel por integration module system cop/ watch- dog time of day clock generator osc pll ipbus clk cop/tod clk core clk ipab ipwdb iprdb dma requests
2 dsp56854 product brief motorola dsp56800e core features the dsp56800e core is based on a harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. the microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both dsp and mcu applications. the instruction set is also highly efficient for c compilers, enabling rapid development of optimized control applications. features of the dsp56800e core include: ? efficient 16-bit dsp engine with dual harvard architecture ? 120 million instructions per second (mips) at 120mhz core frequency ? single-cycle 16 16-bit parallel multiplier-accumulator (mac) ? four (4) 36-bit accumulators including extension bits ? 16-bit bidirectional shifter ? parallel instruction set with unique dsp addressing modes ? hardware do and rep loops ? three (3) internal address buses and one (1) external address bus ? four (4) internal data buses and one (1) external data bus ? instruction set supports both dsp and controller functions ? four (4) hardware interrupt levels ? five (5) software interrupt levels ? controller-style addressing modes and instructions for compact code ? efficient c compiler and local variable support ? software subroutine and interrupt stack with depth limited only by memory ? jtag/enhanced once debug programming interface dsp56854 memory features ? harvard architecture permits up to three (3) simultaneous accesses to program and data memory ? on-chip memory 16k 16-bit program sram 16k 16-bit data sram 1k 16-bit boot rom ? off-chip memory expansion (emi) access up to 2m words of program memory or 8m words of data memory chip select logic for glue-less interface to rom and sram dsp56854 peripheral circuit features ? general purpose 16-bit quad timer with four (4)external pins* ? two (2) serial communication interfaces (sci)* ? serial peripheral interface (spi) port* ? enhanced synchronous serial interface (essi) module* ? computer operating properly (cop)
motorola dsp56854 product brief 3 ? watchdog timer ? jtag/enhanced on-chip emulation (once) for unobtrusive, real-time debugging ? six (6) independent channels of dma ? 8-bit parallel host interface* ? time-of-day (tod) ? up to 41 gpio * each peripheral i/o can be used alternately as a general purpose i/o if not needed energy information ? fabricated in high-density cmos with 3.3v, ttl-compatible digital inputs ? wait and stop modes available dsp56854 description the dsp56854 is a member of the dsp56800e core-based family of digital signal processors (dsps). this device combines the processing power of a dsp and the functionality of a microcontroller with a flexible set of peripherals on a single chip to create an extremely cost-effective solution. the low cost, flexibility, and compact program code make this device well-suited for many applications. the dsp56854 includes peripherals that are especially useful for teledatacom devices; internet appliances; portable devices; tad; voice recognition; hands-free devices; and general purpose applications. best in class development environment the software development kit (sdk) provides fully debugged peripheral drivers, libraries and interfaces that allow a programmer to create his own unique c application code independent of component architecture. the codewarrior integrated development environment is a sophisticated tool for code navigation, compiling, and debugging. a complete set of evaluation modules (evms) and development system cards will support concurrent engineering. together, the sdk, codewarrior, and evms create a complete, scalable tools solution for easy, fast and efficient development. product documentation the four documents listed below are required for a complete description and proper design with the dsp56854. documentation is available from local motorola distributors, motorola semiconductor sales offices, motorola literature distribution centers, or online at www.motorola.com/semiconductors/ . topic description order number dsp56800e reference manual detailed description of the dsp56800e architecture, 16-bit dsp core processor and the instruction set dsp56800erm/d dsp56854 users manual detailed description of memory, peripherals, and interfaces of the dsp56854 dsp5685xum/d dsp56854 technical data sheet electrical and timing specifications, pin descriptions, and package descriptions dsp56854/d dsp56854 product brief summary description and block diagram of the dsp56854 core, memory, peripherals and interfaces (this document) DSP56854PB/d
DSP56854PB/d motorola and the stylized m logo are registered in the us patent & trademark office. all other product or service names are the property of their respective owners. ? motorola, inc. 2002. how to reach us: usa/europe/locations not listed: motorola literature distribution; p.o. box 5405, denver, colorado 80217. 1C303C675C2140 or 1C800C441C2447 japan: motorola japan ltd.; sps, technical information center, 3C20C1, minamiCazabu. minatoCku, tokyo 106C8573 japan. 81C3C3440C3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong kon g . 852C26668334 technical information center: 1C800C521C6274 home page: http://www.motorola.com/semiconductors/ motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, represen tation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application o r use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. typical param eters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all oper ating parameters, including typicals must be validated for each customer application by customers technical experts. motorola does not convey any licens e under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for sur gical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product cou ld create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer s hall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expens es, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. ordering information consult a motorola semiconductor sales office or authorized distributor to order parts. table 1. ordering information part supply voltage package type pin count frequency (mhz) order number dsp56854 1.8v, 3.3v low-profile quad flat pack (lqfp) 128 120 dsp56854fg120


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